We have seen the operator which applies a simple string name to a signal We have also seen which creates a naming operator appropriate for the current level in a design hierarchy The Hardcaml ppx provides a syntax which makes it very convenient to apply scoped names to Hardcaml signals Basic use The syntax can be applied to let bindings whose name will then be applied to the expression A must be excuse me for this in scope for the ppx to work An additional syntax allows the naming of s Naming interfaces Interfaces can be named with the ppx Similarly interfaces containing s are named thus Naming with a module path Interface naming is actually done via a more general framework When we write the ppx finds a function called This is given the thing to name and a prefix derived from the scope and binding name and sets the names This can be applied to specialized Hardcaml types and in particular is implemented for Scope naming # let create scope x let%hw y x in y val create Scope t > t > t <fun> # create Scope create of_string 111 t const names y width 3 value 0b000 %hw scope Always Variable # let create scope let%hw_var x Always Variable wire default gnd in x value val create Scope t > t <fun> # create Scope create t wire names x width 1 # let create scope x let%hw X Of_signal foo x in foo val create Scope t > X Of_signal t > X Of_signal t <fun> # create Scope create X x of_string 111 X Of_signal t X x const names foo$x width 3 value 0b111 Always Variable # let create scope x let%hw X Of_always foo X Of_always wire Signal zero in X Of_always value foo val create Scope t > a > t X t <fun> # create Scope create X x of_string 111 t X t X x wire names foo$x width 1 let%hw Module Path Module Path __ppx_auto_name Always State_machine # let create scope let%hw Always State_machine my_state_machine Always State_machine create module State spec in my_state_machine val create Scope t > State t Always State_machine t <fun> # create Scope create State t Always State_machine t Hardcaml Always State_machine current register names my_state_machine width 1 clock 0b0 clock_edge Rising data_in wire is <fun> set_next <fun> switch <fun>

Bindings which describe a tuple are also supported We can use and with this form also however all components must be of the appropriate and same type ie or or # let create scope x let%hw y z x x 1 in y z val create Scope t > t > t * t <fun> # create Scope create of_string 111 t * t const names y width 3 value 0b000 const names z width 3 value 0b000 %hw_var %hw Module Path Signal t Always Variable t Some_interface t

The final supported form allows lists arrays and iarrays to be named As might be expected it applies the name along with an index for each element is used for lists of signals and is similarly for arrays and iarrays respectively and expect the list array iarray to contain s These forms may also include a module path for use with interfaces and so on # let create scope x let%hw_list foo x in foo val create Scope t > t list > t list <fun> # create Scope create of_string 111 of_string 101 t list const names foo$0 width 3 value 0b111 const names foo$1 width 3 value 0b101 %hw_list %hw_array %hw_iarray %hw_var_list %hw_var_array %hw_var_iarray Always Variable t